The 1997 Petaflops Algorithms Workshop (PAL '97), held April 13-18, 1997 in Williamsburg, VA, is the latest in a series of community-led forums that focus on various aspects of future high-end computing. The specific long-term goal of this effort is to realize a petaflops computing capability by the year 2010.

This workshop was jointly sponsored by several federal agencies associated with the HPCC Program, which has focused on the potential of very high-performance computing.

Attendance to PAL '97 was by invitation only and highly participatory. Attendees were expected to make a "significant contribution" at the meeting and help with follow-up reports, according to David Bailey, chair.

Several U.S. government agencies (including Department of Energy, the National Science Foundation, National Security Agency, DARPA, and NASA) are preparing a program to respond to expected computational needs over the next 5-15 years. The goal is to build systems that perform at a sustained rate of one petaflops, namely 10^15 floating-point operations per second.

Based on some initial studies of possible hardware designs of such systems, it is anticipated that these systems will feature 10,000 to 1,000,000 processors, multi-layer memory hierarchies, and relatively high latencies between processors and main memory. Algorithmic considerations are expected to play an important part in their design, and devising efficient algorithms will be a key challenge in utilizing these systems to their full potential. The PAL '97 workshop focused on these challenges.

In February, President Clinton announced a 25-member US advisory committee charged with giving advice and information on high-performance computing and communications, information technology, and the Next Generation Internet. President Clinton appointed the committee under the High-Performance Computing Act of 1991 (Public Law 102-194) ("Act"). The committee is composed of nonfederal members including representatives of the research, education, and library communities, network providers, and representatives from critical industries.

Clinton designated Ken Kennedy of Rice University as Co-Chair of the Advisory Committee. Among the new appointees are Eric A. Benhamou of 3Com Corporation, Vinton Cerf of MCI Communications, Ching-Chih Chen of Simmons College, David Cooper of Lawrence Livermore National Laboratory, Steven D. Dorfman of Hughes Electronics Corporation, Robert Ewald of Silicon Graphics, Inc., David J. Farber of University of Pennsylvania, Sherrilynne S. Fuller of University of Washington, Hector Garcia-Molina of Stanford University, Susan Graham of University of California, Berkeley, James N. Gray of Microsoft's Bay Area Research Center, W. Daniel Hillis of Walt Disney Imagineering, David C. Nagel of AT&T Labs, Raj Reddy of Carnegie Mellon University, Edward H. Shortliffe of Stanford University School of Medicine, Larry Smarr of University of Illinois, Leslie Vadasz of Intel Corporation, Andrew J. Viterbi of QUALCOMM Incorporated and Steven J. Wallach of Hewlett-Packard.

One of the Committee's first tasks will be to provide guidance on the Next Generation Internet Initiative announced by the President in October 1996. The Committee will also provide advice on other HPCC Program areas including High-End Computing and Computation, which includes about 70 percent of NASA's Program.

The first portion of a CRAY T3E supercomputer was placed at NASA Goddard Space Flight Center (GSFC) in March. The 256-processor system is a continuation of Cray Research's cooperative agreement with the NASA HPCC Program Earth and Space Sciences (ESS) project. By June the CRAY T3E will be expanded with an additional 128 CRAY T3E-900 processors, which are 50 percent faster, resulting in 268 gigaflops peak speed. Together with 49 gigabytes of memory, the 384-processor CRAY T3E will allow the nine ESS Grand Challenge investigation teams to attain at least 25 gigaflops sustained on their applications (see "Earth and space sciences project awards $25.8 million to advance Grand Challenge applications" on page 18 of INSIGHTS issue one).

Earlier this year, the teams achieved 10 gigaflops performance milestones on a GSFC-resident CRAY T3D with 512 processors and 32 gigabytes of memory. The CRAY T3E replaces this system. Time on the CRAY T3E also is divided among NASA HPCC Program Computational Aerosciences project investigations and other NASA researchers.

"NASA Communicating Science: A Look to the Future," the spring 1997 NASA Information Infrastructure Technology and Applications (IITA) Conference, will be held at Lockheed Martin Missiles & Space Company, Sunnyvale, California on May 19-21, 1997. Principal investigators and NASA staff will exchange information about their products with industry partners.

May 13-14, 1997
Sheraton Premiere Hotel at Tyson's Corner, 8661 Leesburg Pike, Vienna, VA. 22182

The Federal Large Scale Networking Working Group (LSN) of the National Science and Technology Council's Committee on Computing, Information, and Communications R&D Subcommittee is sponsoring a workshop in May on the Next Generation Internet (NGI). LSN members include the National Institutes of Health, National Security Agency, Department of Energy, NASA, Department of Defense, DARPA, National Oceanic and Atmospheric Administration and National Science Foundation. Attendees will be selected by the program committee from papers submitted in March 1997.

September 15-18, 1997
NASA Ames Research Center Moffett Field, CA 94035-1000

The NASA Research and Education Network (NREN) project is part of a multiagency development effort that will enable demonstrations of next-generation networking applications among scientists, engineers and the computing resources of the Federal High Performance Computing and Communications (HPCC) Program. As the NASA component of the interagency Next Generation Internet, the NREN project assures U.S. technological leadership in networking.