A Scalable-Feasible Parallel Computer Implementing Electronic and Optical Interconnections for 156 TeraOPS Minimum Performance
Sotirios G. Ziavras, Haim Grebel
New Jersey Institute of Technology
Anthony T. Chronopoulos
Wayne State University
The main objective of this project is to develop a "point design" for an advanced MIMD computer system capable of achieving at least 100 TeraOPS performance with technology that will definitely become feasible in less than a decade.
Our design takes advantage of free-space optical technologies to produce a one-dimensional building block (BB) that implements efficiently a large, almost fully-connected system of processors.
In addition to having a scalable architecture, our BB is also technology scalable, and therefore the number of contained processors in the BB could increase dramatically with expected improvements in optical technologies. A simple two-dimensional structure is proposed for the complete system, where the aforementioned one-dimensional BB is extended into two dimensions. With readily available technology, the word-wide optical interconnection network can be viewed as a mesh of relatively short plastic bars to which interfaces to processor cards are attached. Each processor card contains eight processors interconnected locally with an electronic crossbar. Taking advantage of higher-speed optical technologies, all eight processors share the same optical interface to the optical medium. Even though our investigation will be carried out for a two-dimensional system, its high-level architecture is also scalable because it can be extended straightforwardly for any number of dimensions larger than two.
comments to: Larry Picha
posted: 19 April 96PAWS'96