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Antifuse
|
A
two-terminal device that is normally a high resistive element and is
programmed to a low impedance.
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|
Architecture
|
The
common logic structure of a family of programmable integrated
circuits. The same architecture may be realized in different
manufacturing processes.
|
|
ASIC
(Application Specific Integrated Circuit):
|
IC
product customized for a single application.
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|
Asynchronous
|
A
signal whose data is acknowledged or acted upon immediately,
irrespective of any clock signal.
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|
Boundary
scan
|
Boundary
scan is a methodology allowing complete controllability and observability
of the boundary pins of a JTAG-compatible device via software
control. This capability enables in-circuit testing without the need
of in-circuit test equipment.
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|
Cell
Library
|
The
collective name for the set of logic functions defined by the
manufacturer of an Application-Specific Integrated Circuit (ASIC).
The designer decides which types of cells should be realized and
connected together to make the device perform its desired function.
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|
Chip
|
Another
name for an integrated circuit.
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|
Codec
|
Short
for compressor/decompressor, a codec is any technology for
compressing and decompressing data. Codecs can be implemented in
software, hardware, or a combination of both. Some popular codecs for
computer video include MPEG, Indeo and Cinepak.
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|
Combinatorial
|
A
digital function whose output value is directly related to the
current combination of values on its inputs. Also known as
combinational.
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|
Comparator
(digital)
|
A
logic function that compares two binary values, and outputs the
results in terms of binary signals representing less-than and/or
equal-to and/or greater-than.
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|
Configurable/Complex
Logic Block (CLB)
|
The
array of multi-input and multi-output logic cells to be programmed.
CLB is a configurable logic block that consists mainly of Look-up
Tables (LUTs) and flip flops.
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|
Cores
|
In the
semiconductor design industry, refers to predefined functions such as
processors or bus interfaces that are typically licensed from the
software developer. Cores can be implemented directly in silicon,
either in fixed logic or programmable logic devices, and saves chip
designers time during product development. Synonymous with
Intellectual Property.
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|
CPLD
(Complex Programmable Logic Device)
|
Programmable
logic devices characterized by an architecture offering high speed,
predictable timing and simple software.
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|
Die
|
An
unpackaged integrated circuit. In this case, the plural of die is
also die.
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|
Digital
Signal
|
A
digital signal is one whose key characteristic (e.g., voltage or
current) fall into discrete ranges of values. Most digital
systems utilize two voltage levels (low and high values).
|
|
Digital
Signal Processor (DSP)
|
A
specialized CPU used for digital signal processing of signals such as
sound, video, and other analog signals which have been converted to
digital form. Some uses of DSP are to decode modulated signals from
modems, to process sound, video, and images in various ways, and to
understand data from sonar, radar, and seismological readings.
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|
EEPROM
(Electrically-Erasable Programmable Read-Only Memory)
|
A
memory device whose contents can be electrically programmed by the
designer. Additionally, the contents can be electrically erased
allowing the device to be reprogrammed.
|
|
Electro-Static
Discharge (ESD)
|
The
term electro-static discharge refers to a charged person, or object,
discharging static electricity. Although the current associated with
such a static charge is low, the electric potential can be in the
millions of volts and can severely damage electronic components.
|
|
EPROM
(Erasable Programmable Read-Only Memory)
|
A
memory device whose contents can be electrically programmed by the
designer. Additionally, the contents can be erased by exposing the
die to ultraviolet light through a quartz window mounted in the top
of the component's package.
|
|
Falling-Edge
|
A
transition from a logic 1 to a logic 0. Also known as a negative
edge.
|
|
Firmware
|
Software
programs, or sequences of instructions, that are hard-coded into
non-volatile memory devices.
|
|
FIFO
First-in
first-out
|
A data
structure or hardware buffer where items come out in the same order
they came in.
|
|
Flash
memory
|
Non-volatile
storage device similar to EEPROM, but where erasing can only be done
in blocks or the entire chip.
|
|
Flip-flop
|
A
digital logic circuit that can be switched back and forth between two
states.
|
|
FPGA
(Field Programmable Gate Array)
|
High
density PLD containing small logic cells interconnected through a
distributed array of programmable switches. This type of architecture
produces statistically varying results in performance and functional
capacity, but offers high register counts. Programmability typically
is via volatile SRAM or one-time-programmable antifuses.
|
|
Fuse
|
A
two-terminal device that is normally a low resistive element and is
programmed or "blown" resulting in an open or high
impedance.
|
|
Gate
|
In
electronic circuitry, a pathway that may be open or closed, depending
on the source of the input, the strength of a signal, or the
conductivity of chemicals used in semiconductors. Logic gates are
programmed to correspond to related "if-then" statements.
The state of an open or closed gate is analogous to the binary state
of a 0 or a 1. The application of this analogy allows computing
machinery with millions of gates to respond conditionally and to
perform logical functions.
|
|
Gate
Array
|
IC
that is customized by interconnecting an array of logic elements.
Customization is performed by the manufacturer and typically involves
non-recurring engineering (NRE) costs and several design iterations.
|
|
Glue
|
Generic
term for any interface logic or protocol that connects two component
blocks. Hardware designers call anything used to connect large VLSI’s
or circuit blocks "glue logic."
|
|
Hardware
Description Language (HDL)
|
A kind
of language used for the conceptual design of integrated circuits.
Examples are VHDL and Verilog.
|
|
IC
(Integrated Circuit)
|
A
device in which components such as resistors, capacitors, diodes, and
transistors are formed on the surface of a single piece of
semiconductor.
|
|
In-Circuit
Reconfigurable (ICR)
|
An SRAM-based
or similar component which can be dynamically reprogrammed on-the-fly
while remaining resident in the system.
|
|
In-System
Programmable (ISP)
|
An
EEPROM-based, FLASH-based, or similar component which can be
reprogrammed while remaining resident on the circuit board.
|
|
JEDEC
(Joint Electronic Device Engineering Council)
|
A
council which creates, approves, arbitrates, and oversees industry
standards for electronic devices. In programmable logic, the term
JEDEC refers to a textual file containing information used to program
a device. The file format is a JEDEC approved standard and is
commonly referred to as a JEDEC file.
|
|
JHDL
|
JHDL
is a method of describing (programmatically, in JAVA) the components
and connections in a digital logic circuit. More specifically, JHDL
provides object classes used to build up circuit structure.
|
|
JTAG
|
Joint
Test Action Group (JTAG, or "IEEE Standard 1149.1").
A
standard specifying how to control and monitor the pins of compliant
devices on a printed circuit board.
|
|
Logic
|
One of
the three major classes of ICs in most digital electronic systems:
microprocessors, memory, and logic. Logic is used for data
manipulation and control functions that require higher speed than a
microprocessor can provide.
|
|
Logic
Function
|
A
mathematical function that performs a digital operation on digital
data and returns a digital value.
|
|
Logic
Gate
|
The
physical implementation of a logic function.
|
|
Logic
Synthesis
|
A
process in which a program is used to optimize the logic used to
implement a design.
|
|
Look-Up
Table (LUT)
|
An
array or matrix of values that contains data that is searched. An
alternative implementation of a CLB; the multiple inputs generate the
complex outputs.
|
|
Macrocell
|
A
macrocell on most modern CPLDs contains a sum-of-products
combinatorial logic function and an optional flip-flop. The
combinatorial logic function typically supports four to sixteen
product terms with wide fan in. Thus, a macrocell may have many
inputs, but the logic function complexity is limited. On the other
hand, most FPGA logic blocks have unlimited complexity, but the logic
function only has four inputs.
|
|
Netlist
|
A list
of names of symbols or parts and their connection points, which are
logically connected in each net of a circuit. A file listing
parameters extracted from a circuit schematic.
|
|
Noise
|
The
miscellaneous rubbish that gets added to a signal on its journey
through a circuit. Noise can be caused by capacitive or inductive
coupling, or from externally generated interference.
|
|
Non-volatile
|
The
memory elements keep their contents when power is removed from the
device.
|
|
Onboard
|
Contained
on the device or on the board.
|
|
One
Time Programmable
|
This
device can be programmed only once; it's contents can not be
changed. While typically these devices are fuse or antifuse
based, they can also be low-cost EPROM devices. In this case,
typically used for production devices, an inexpensive package is used
without a window.
|
|
Partial
Reprogrammability
|
The
ability to leave the internal logic in place and change just one part
of the FPGA.
|
|
Pinout
|
A
diagram that indicates how wires are terminated to pins in a
connector. A list that assigns device functions to specific pins.
|
|
Place
and Route
|
Using
backend implementation software tools, the process of connecting
various memory elements in an FPGA to create a custom logic circuit.
|
|
Programmable
Logic
|
A
logic element whose function is not restricted to a particular
function. It may be programmed at different points of the life
cycle. At the earliest, it is programmed by the semiconductor
vendor (standard cell, gate array), by the designer prior to
assembly, or by the user, in circuit.
|
|
Programmable
Logic Controller
|
A
control device usually used in industrial control applications that
employ the hardware architecture of a computer and relay ladder
diagram language. Inputs to PLC’s can originate from many
sources including sensors and the outputs of other logic devices.
Also called "programmable controller".
|
|
Reconfigurable
Computing
|
A
methodology of using programmable logic devices in a system design
such that the hardware-based logic can be changed to perform various
tasks. Benefits include the use of fewer components, less power, and
the flexibility that bring about. Also allows networked equipment in
the field to be upgraded or repaired remotely.
|
|
Reprogrammable
|
These
devices can have their configuration loaded more than once.
SRAM-based devices may be reloaded without restriction. Many
other forms of reprogrammable elements have restrictions on the
number of write cycles, although they are high enough not to be of
practical concern for most applications.
|
|
Rising-Edge
|
A
transition from a logic 0 to a logic 1. Also known as a positive
edge.
|
|
RTL
Register
Transfer Level
|
Register
transfer level description, also called register transfer logic, is a
description of a digital electronic circuit in terms of data flow
between registers, which store information between clock cycles in a
digital circuit. RTL description specifies what and where this
information is stored and how it is passed through the circuit during
its operation.
|
|
Sensor
|
A
transducer that detects a physical quantity and converts it into a
form suitable for processing. For example, a microphone is a sensor
which detects sound and converts it into a corresponding voltage or
current.
|
|
SRAM
Static
Random Access Memory
|
A type
of memory that is faster and more reliable than the more common DRAM
(dynamic RAM). The term static is derived from the fact that it
doesn't need to be refreshed like dynamic RAM, but it loses its
memory if it's powered off.
|
|
Standard
Cell
|
This
device differs from the gate array since each cell may be different
and optimized for each "standard" function. There are
no standard layers to the device and each layer of the chip is a
unique design.
|
|
State
Machine
|
The
actual implementation (in hardware or software) of a function that
can be considered to consist of a set of states through which it
sequences.
|
|
Switch
|
A
device for making or breaking an electric circuit, or for selecting
between multiple circuits.
|
|
Synchronous
|
(1) A
signal whose data is not acknowledged or acted upon until the next
active edge of a clock signal. (2 )A system whose operation is
synchronized by a clock signal.
|
|
Trace
|
A line
or "wire" of conductive material – such as copper,
silver, or gold – on the surface of or sandwiched inside a PCB,
printed circuit board. These traces are often called individually a
run. Traces carry an electronic signal or other forms of electron
flow from one point to another.
|
|
Truth
Table
|
A
convenient way to represent the operation of a digital circuit as
columns of input values and their corresponding output responses.
|
|
Verilog
|
A
Hardware Description Language for electronic design and gate-level
simulation.
|
|
VHDL
Very
High Speed Integrated Circuit (VHSIC) Hardware Description Language
|
A
Hardware Description Language for electronic design and gate-level
simulation.
|
|
Via
|
Feed-through.
A plated through-hole in a printed circuit board used to route a
trace vertically in the board, that is, from one layer to
another.
|
|
Volatile
|
The
memory elements lose their contents when power is removed from the
device. SRAM-based devices are volatile and require another
device to store their configuration program.
|
